Getting Started Integrations Reference Hardware Firmware Scaling Tools Support & Troubleshooting

SPI

This object allows you to communicate with SPI ("Serial Peripheral Interface") devices, with the device as the master device.

Interface Maximum Speed (Gen2) Maximum Speed (Gen 3) Maximum Peripheral Devices
UART Serial 230 Kbit/sec 1 Mbit/sec 1 (point-to-point)
I2C 400 Kbit/sec 400 Kbit/sec Many (limited by addresses)
SPI 60 Mbit/sec 32 Mbit/sec Many (limited by CS GPIO pins)

SPI slave mode is supported as well (since DeviceOS 0.5.0). On Gen 3 devices (Argon, Boron, B-Series SoM, and Tracker SoM), SPI slave can only be used on SPI1.

The hardware SPI pin functions, which can be used via the SPI object, are mapped as follows:

Gen 3 Devices (nRF52) (B-Series SoM, Tracker SoM, Tracker One, Boron, Argon, and E404X):

On the Argon, Boron, and Xenon:

  • SS => A5 (D14) (but can use any available GPIO)
  • SCK => SCK (D13)
  • MISO => MISO (D11)
  • MOSI => MOSI (D12)

On the B-Series SoM:

  • SS => D8 (but can use any available GPIO)
  • SCK => SCK (D13)
  • MISO => MISO (D11)
  • MOSI => MOSI (D12)

On the Tracker SoM:

  • SS => A7/D7 (but can use any available GPIO)
  • SCK => A6/D6
  • MISO => A5/D5
  • MOSI => A4/D4

There is a second hardware SPI interface available, which can be used via the SPI1 object. This second port is mapped as follows:

  • SCK => D2
  • MOSI => D3
  • MISO => D4

Note: On Gen 3 devices, the SPI1 pins different than 2nd-generation (Photon/Electron), so you cannot use SPI1 on a Gen 3 device with the classic adapter.

P2 and Photon 2 Devices (RTL872x):

The P2 and Photon 2 supports two SPI (serial peripheral interconnect) ports.

Pin Pin Name Description Interface MCU
40 S0 / D15 S0 GPIO, PWM, SPI MOSI, Serial3 TX, I2S MCLK. (Was P1S0 on P1.) SPI (MOSI) PA[12]
41 S1 / D16 S1 GPIO, PWM, SPI MISO, Serial3 RX. (Was P1S1 on P1.) SPI (MISO) PA[13]
42 S2 / D17 S2 GPIO, SPI SCK, Serial3 RTS. (Was P1S2 on P1.) SPI (SCK) PA[14]
44 S3 / D18 S3 GPIO, I2S TX. (Was P1S3 on P1.), SPI SS SPI (SS) PB[26]
45 D2 D2 GPIO, Serial2 RTS, SPI1 MOSI SPI1 (MOSI) PA[16]
51 D3 D3 GPIO, Serial2 CTS, SPI1 MISO SPI1 (MISO) PA[17]
52 D4 D4 GPIO, Serial2 TX, SPI1 SCK SPI1 (SCK) PA[18]
53 D5 D5 GPIO, Serial2 RX, SPI1 SS SPI1 (SS) PA[19]
  • The SPI port is 3.3V and must not be connected directly to devices that drive MISO at 5V
  • If not using a SPI port, its pins can be used as GPIO
  • Any pins can be used as the SPI chip select
  • Multiple devices can generally share a single SPI port
  • SPI uses the RTL872x SPI1 peripheral (25 MHz maximum speed)
  • SPI1 uses the RTL872x SPI0 peripheral (50 MHz maximum speed)
  • Note: The P2/Photon 2 maximum speeds for SPI and SPI1 are reversed from the M-SoM
  • SPI1 shares the same pins as Serial2

If you are using SPI, Device OS 5.3.1 or later is recommended. Prior to that version, SPI ran at half of the set speed, and SPI1 ran at double the set speed. Timing has also been improved for large DMA transfers; prior to 5.3.1, there could be 1 µs gaps for every 16 bytes of data transferred.

M-SoM Devices (RTL872x):

The M-SoM supports two SPI (serial peripheral interconnect) ports.

Pin Pin Name Description Interface MCU
36 TX / D9 Serial TX, PWM, GPIO, SPI1 MOSI, I2S MCLK SPI1 (MOSI) PA[12]
38 RX / D10 Serial RX, PWM, GPIO, SPI1 MISO SPI1 (MISO) PA[13]
40 D3 D3 GPIO, Serial1 CTS flow control (optional), SPI1 SS SPI1 (SS) PA[15]
42 D2 D2 GPIO, Serial RTS flow control (optional), SPI1 SCK SPI1 (SCK) PA[14]
48 D8 D8 GPIO, SPI SS SPI (SS) PA[19]
50 MISO / D11 D11 GPIO, PWM, SPI MISO SPI (MISO) PA[17]
52 MOSI / D12 D12 GPIO, PWM, SPI MOSI SPI (MOSI) PA[16]
54 SCK / D13 D13 GPIO, SPI SCK SPI (SCK) PA[18]
  • The SPI port is 3.3V and must not be connected directly to devices that drive MISO at 5V
  • If not using a SPI port, its pins can be used as GPIO
  • Any pins can be used as the SPI chip select
  • Multiple devices can generally share a single SPI port
  • SPI uses the RTL872x SPI0 peripheral (50 MHz maximum speed)
  • SPI1 uses the RTL872x SPI1 peripheral (25 MHz maximum speed)
  • Note: The M-SoM maximum speeds for SPI and SPI1 are reversed from the P2/Photon 2
  • SPI1 shares the same pins as Serial2

If you are using SPI, Device OS 5.3.1 or later is recommended. Prior to that version, SPI ran at half of the set speed, and SPI1 ran at double the set speed. Timing has also been improved for large DMA transfers; prior to 5.3.1, there could be 1 µs gaps for every 16 bytes of data transferred.

Gen 2 Devices (STM32) (E-Series, Electron, Photon, and P2; does not include E404X):

  • SS => A2 (default)
  • SCK => A3
  • MISO => A4
  • MOSI => A5

There is a second hardware SPI interface available, which can be used via the SPI1 object. This second port is mapped as follows:

  • SS => D5 (default)
  • SCK => D4
  • MISO => D3
  • MOSI => D2

Additionally on the Electron and E-Series, there is an alternate pin location for the second SPI interface, which can be used via the SPI2 object. As this is just an alternate pin mapping you cannot use both SPI1 and SPI2 at the same time. This alternate location is mapped as follows:

  • SS => D5 (default)
  • SCK => C3
  • MISO => C2
  • MOSI => C1

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